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Intel’s 32nm Westmere processor desktop motherboard testing.

Bob Baker, Vice President of technology and manufacturing, displays a silicon wafer containing the world’s first working chips built on 22nm manufacturing technology. The circuitry contained on each chip is so small that 2.9 billion transistors can be packed into an area the size of a fingernail.

Inside Intel

How the world’s most recognized chipmaker manages product development.

More than 40 years ago, Intel co-founder Gordon Moore made a prediction many thought unimaginable: the number of transistors on a microchip would double every two years. He could hardly imagine how prophetic his words were in 1965. His prediction has become known as “Moore’s Law.” And Intel—go ahead, hum the tune—has delivered on that promise. The company continues to innovate at a rapid pace, recently ramping production of a new family of 32nm processors with 2.9-billion transistors, down in size from the existing 45nm. While dealing at the nanometer level is a bit difficult for most people to conceptualize and the amount of improvement in compute power is similarly hard to fathom, Bob Baker, Intel’s senior vice president of Technology and Manufacturing, has a useful analogy: “From 1970, the growth in computing power has continued to climb. I think if we put that in a practical manner—a way that we can all relate to is gas mileage—if the auto industry had developed their technologies and been able to follow Moore’s law, we’d be getting 100,000 miles per gallon.”

The rapid pace of technological change requires Intel to stay several steps ahead of the competition, but how does the company do it? Through a regimented product development process, which begins the moment after a new product is announced. In the case of the latest 32nm Westmere microprocessor family , researchers were already hard at work crafting 22nm, 15nm and sub-15nm technologies, with the latter arriving in 2015 and beyond.

Development Driven By Data

In the early stages of development, researchers and engineers begin what is best described as an exploration of what future usage segments—such as embedded products, mobile personal computing, wireless handheld devices, desktop personal computing, telecom controlled environment or industrial applications—will require in terms of the power output of the chip or device. Then the quality and reliability expectations are also discussed. Once the team determines to which usage segments the technology will be applied, usage measurement studies are conducted using data from customer surveys and hypothetical usage scenarios; careful attention is paid to international regulatory requirements. If it is determined the technology under investigation holds some promise, the team moves into more concrete planning, where all of the technical challenges, or risks, are indentified and evaluated. Here, teams look at hypothetical items that might affect reliability and performance, like thermal cycling. Various scenarios are considered and virtually tested until the processor reaches failure; the team then identifies ways to eliminate the risks and establish operational limitations. This is also the stage of the process where a product implementation plan is developed—outlining required headcount, expenses and capital cost requirements, as well as which development tools will be needed, including reliability calculators, CAD software and stress test equipment—and the “green light” is given for initial development.

Bringing It All Together

The initial development phase is where the bits begin to meet the bytes. Intel assigns a formal Qualification Approval Board that has the task of assuring the exploration-stage findings are accurate, especially when it comes to reliability, risk management and execution requirements. A pre-silicon qualification plan is developed, with engineers and designers using various CAD and internal systems to assure the intended product is correct-by-construction in several key metrics: power-grid planning for electro-migration, signal routing for joule heating, and verification of cell libraries. Engineers use best-known methods to test reliability—latch-up, signal integrity, antenna charging—using simulation tools. The team also shares pre-production data with various suppliers and customers once the product has completed a significant portion of the qualification plan to assure compliance with external applications and manufacturing requirements.  “It takes process optimization, coupled with our design tools…and alignment with manufacturing capability…so it has to be an integrated system. It isn’t just one or two large CPU design teams at Intel, it’s many smaller design teams. It takes a view of the platform; what platform quality is required, how the package is integrated. And it’s becoming more and more critical how we interface with the software to bring the entire package together,” Baker says.
 
In an effort to speed development, validation is handled at the same time as product qualification; the company has thousands of employees in more than 20 locations throughout the world focused on the validation process, which itself is divided between pre- and post-silicon validation. The pre-silicon engineering validation team uses simulation tools to test each major subsystem of the chip, including unit and cluster functionality, to pinpoint any design flaws early in the process; chip-level simulation then tests all of the performance parameters of the chip, including simultaneous subsystem operation with a focus on unit and pin interfaces tested under tightly controlled conditions. System-level simulation—in a full operating environment with other platform components against industry bus standards—is also conducted to assure compatibility with various operating systems and hardware. Finally, a behavioral model chip is developed and used in a hardware emulator—which can test up to tens of millions of gates at frequencies exceeding 10 MHz—to test the logic functionality of the chip design, while also providing for debugging of BIOS and software drivers; Intel has developed proprietary interfaces to accelerate the testing process. “We’re working on a modular intellectual property [IP] database that our designers can share across the company, both internal and external IP where we’re able to incorporate that on our process technologies. It goes to converge tools and methodology so the design teams across the world can reuse the same design methodology and get the results that they’re expecting,” says Baker.
 

Once the chip passes pre-silicon testing, fabrication of test units begin and those are tested in live systems to assure the design has met all the quality and operating parameters. At Intel, testing varies depending on whether the chip is designed for microprocessor or chipset applications. If it’s a microprocessor, cache coherency and functionality in multiprocessor environments are tested. For example, during the development of the Pentium 4 processor, post-silicon testing included: 2,450 microprocessor feature tests; 2,000 legacy architectural tests; 1 trillion random instruction tests per week; and millions of chipsets feature tests focused on I/O stress testing. Chipsets, however, are tested using custom-built system validation boards and test cards with performance parameters pushed to their extremes to verify bus compatibility. Chipsets with integrated graphics are tested using specialized tools and test suites, with root cause determined for every wrong bit to assure full resolution of potential faults. Analog verification—targeted on AC timing, buffer characteristics, power integrity and signal integrity—is conducted along with compatibility validation on a typical system that includes subsystems such as components, boards, chassis, BIOS, operating systems and application hardware. While Intel continues to move at an ever-accelerating pace when it comes to new product introduction and innovation, the company remains consistent in the fact that not only does it needs to move fast, it also has to be at the pinnacle when it comes to quality, which is why it’s process is multi-faceted, yet structured. Still, if there’s one thing that Intel tries to do consistently, it’s pushing the boundaries of innovation, which brings us to another one of Moore’s insights: “With engineering, I view this year's failure as next year's opportunity to try it again. Failures are not something to be avoided. You want to have them happen as quickly as you can so you can make progress rapidly.”

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